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When enabled by high-bandwidth solid-state memory and field programmable gate arrays, the cloud and data center become faster and more powerful. This enables additional capabilities for things and devices, which drives the virtuous cycle. Of course, this cycle drives Intel's supply chain characteristics, including blending internal and external outsource manufacturing supply chains, which have different objectives.
So how can Intel deliver profitable value in a hybrid supply chain that requires a blend of old and new characteristics? The Intel supply chain responded by initiating the Integrated Silicon Supply Chain Program (ISSP) in early-2015.
The program’s objective has been to standardize demand planning, supply planning, and procurement supply chain functions into one, configurable and integrated supply chain. Creating this standardization requires the engagement, cooperation, and collaboration of several functions within Intel, including:
1. Intel business units are responsible for all sales, marketing, product definition, and technical development of new products.
2. Microprocessor marketing and business planning is a central function responsible for rationalizing demand projections from multiple business units into one, standard demand statement for Intel.
3. Customer fulfillment, planning, and logistics are responsible for supply planning and delivery of goods to customers.
4. Global supply management is a central function that manages all interfaces between Intel and its world-wide base of suppliers.
Intel’s second overall program objective has been to land the supply chains of acquired companies, including their outsource relationships, into the Intel supply chain.
Demand planning, platform planning, and master data
Among innovations on the demand planning side, Intel developed the capability to accept demand formats from multiple different business units. This allows business units to collect demands using their preferred methods, and still put the demands into a format useful to the supply planning engine.
Intel completed a two-year effort to deliver the Platform Analysis Tool (PAT) capability for its hybrid supply chain. Platform products are single products with multiple internally and externally sourced silicon components. PAT allows Intel planners to compare and rationalize demand signals for multiple components of platform products, and align supply and inventory holding strategies for all components of a platform. During periods of supply shortages, PAT allows planners to make revenue-informed decisions around which demands and inventory holding strategies to support.
On the master data front, Intel defined a consistently-applied approach that avoided negative impacts to dependent stakeholder groups such as end-customers, sales, and finance. On the finished goods (FG) level, Intel addressed the complexities of mapping non-standard FG naming conventions to standard Intel product identifiers to align with existing tools, processes, and legal requirements for tax and trade. Once a standard identifier was defined, Intel used a standard bill of materials and unified planning item structure to initiate and drive its global manufacturing capabilities. To enable the appropriate planning and procurement functions, additional data characteristics and values (e.g., capacity, cycle times, product yields, etc.) were then defined and enabled within its automation infrastructure to ensure that targeted manufacturing requirements could be met without exceeding inventory and customer demand.
Two innovations are remarkable in the hybrid manufacturing case. First, the team developed an algorithm to address “unlimited” external capacity. For Intel factories, the total available capacity is a known quantity, and the standard optimization formulation seeks to maximize use of available capacity. For external factories, Intel developed algorithms that constrain the amount of overflow capacity sought, and Intel developed business processes to optimize the volume and volatility of demand on suppliers.
Second, the team developed several algorithms that allowed Intel to skip or add manufacturing stages on the fly. Intel’s internal manufacturing processes follow a standard flow: fabrication, sort, die prep, die bank, assembly, and test. Some of its externally produced products follow manufacturing flows where some steps are skipped or added – e.g., process flows where the assembly and test steps are repeated. Intel developed algorithms that allow it to make the bill of materials “generic”, and make the optimal build plan decisions based on the generic flow.
Supplier management and procurement
Many of Intel’s acquisitions have been fabless companies that lack integrated manufacturing. In many cases, these acquisitions have existing relationships with outsource manufacturing suppliers that are different from Intel’s existing relationships. Intel has traditionally relied on outsource manufacturing for processes of combining multiple components into a single module ready for sale. The silicon foundry and outsource assembly/test relationships are relatively new for Intel, and these represent an innovation all on their own.
There have been two primary innovations in procurement: incentives and algorithms. For incentives, Intel balances the cost and performance of multiple suppliers through careful monitoring of price and quality. Suppliers that cost too much and underperform based on late deliveries and poor product quality will be deprioritized next to suppliers who cost less and meet commitments. The innovation was to find an appropriate method of incorporating this “site split” model as part of the procurement strategy, and to assure that optimization algorithms reflected the overall supplier management strategy.
For algorithms, every interaction between traditional Intel, new Intel acquisitions, and suppliers seemed to have a different mechanism: electronic data interchange, emailed spreadsheet, email text, and even phone call. The innovation here was to standardize all silicon suppliers on one EDI system, and to make sure each Intel business unit and their suppliers used the new system.
Factory capacity sizing
Intel factories for wafer fabrication, assembly, and test can be configured to produce many of the same products that Intel currently sends to outsource manufacturing suppliers. For example, for some connectivity products, Intel manufacturing can take receipt of wafer fabrication output from silicon foundries, and assemble and test these devices at both Intel factories and external outsource suppliers.
Owing to the size, scale and utilization efficiency of Intel’s manufacturing supply chain, Intel can produce goods at better than cost parity with external outsource manufacturing. Intel supply chain is pursuing options to use the Intel manufacturing network as part of a long-term strategy to offer more choice to Intel business units and customers. During product ramps from initially low to high volumes, Intel supply chain and manufacturing need to make decisions about how much capacity to install.
To gain insight into the factory capacity sizing decision in the presence of outsource manufacturing, Intel developed a novel optimization and Monte Carlo simulation modeling methodology. Intel followed these steps:
1. Using the official demand plan, perform a mixed-integer optimization model to recommend Intel factory tool purchases by quarter. The result is a factory capacity model at quarterly granularity.
2. Using probability distributions of demand observed for historically similar products, perform a Monte Carlo simulation model that varies demand. Measure output and utilization for both Intel factories and outsource manufacturing factories. Repeat this simulation model for 10,000 trials, and record the results as box plots.
3. Investigate various Intel factory sizes from largest to smallest, and perform 10,000 trials as in Step 2. Record the output in box plots. The result is a simple set of box plots used by Intel manufacturing and supply chain to determine the best capacity build strategy in the presence of demand uncertainty.
Results and testimonials
In 1Q15, the ISSP and make/buy scenario analysis programs were concept-phase only. In a short two-year span, Intel ramped from zero volume to significant volumes using ISSP tools.
Intel has deployed the ISSP technology on 10 existing Intel-based silicon business units, including a variety of different component routes and manufacturing stage configurations. Each deployment brought additional planners into the ISSP family, and simplified the company’s interface to external outsource suppliers.
In the past several years, Intel developed a world-class optimization engine that solves very large problems with approximately 100,000 decision variables and 90,000 constraints in less than 10 minutes per solve. These optimizations are performed to assist in making decisions on a weekly and monthly cadence. Intel re-purposed this optimization engine to accommodate the hybrid case of Intel and outsource manufacturing supply chain.
Intel converted multiple procurement processes onto a single process for generating procurement and purchase order requests to outsource silicon foundry and assembly and test suppliers, beginning from four distinct methods, and applied to 15-20 different suppliers to Intel.
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